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PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840001I
FEMTOCLOCKSTMCRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
FEATURES
* 1 LVCMOS/LVTTL output, 7 typical output impedence * Crystal oscillator interface designed for 26.5625MHz, 18pF parallel resonant crystal * Selectable 106.25MHz or 212.5MHz output frequency * VCO range: 560MHz to 680MHz * RMS phase jitter @ 106.25MHz, using a 26.5625MHz crystal (637kHz - 5MHz): 0.70ps (typical) * 3.3V or 2.5V operating supply * -40C to 85C ambient operating temperature
GENERAL DESCRIPTION
The ICS840001I is a Fibre Channel Clock Generator and a member of the HiPerClocksTM HiPerClockSTM family of high performance devices from ICS. The ICS840001I uses a 26.5625MHz crystal to synthesize either 106.25MHz or 212.5MHz, using the FREQ_SEL pin. The ICS840001I has excellent phase jitter performance, over the 637kHz - 5MHz integration range. The ICS840001I is packaged in a small 8-pin TSSOP, making it ideal for use in systems with limited board space.
ICS
FUNCTION TABLE
Input FREQ_SEL 0 1 Crystal: 26.5625MHz Output Frequencies 106.25MHz (Default) 212.5MHz
BLOCK DIAGRAM
OE FREQ_SEL (Pullup) (Pulldown)
PIN ASSIGNMENT
VDDA OE XTAL_OUT XTAL_IN 1 2 3 4 8 7 6 5 VDD Q GND FREQ_SEL
XTAL_IN
OSC
XTAL_OUT
Phase Detector
VCO
637.5MHz w/ 26.5625MHz Ref.
/3
1
Q
ICS840001I
8-Lead TSSOP 4.40mm x 3.0mm x 0.925mm package body G Package Top View
/6
0
M = /24 (fixed)
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. 840001AGI www.icst.com/products/hiperclocks.html REV. A JUNE 20, 2005
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PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840001I
FEMTOCLOCKSTMCRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
Type Power Input Input Input Power Description
TABLE 1. PIN DESCRIPTIONS
Number 1 2 3, 4 5 6 7 8 Name VDDA OE XTAL_OUT, XTAL_IN FREQ_SEL GND Q VDD Analog supply pin. Output enable pin. When HIGH, Q output is enabled. Pullup When LOW, forces Q to HiZ state. LVCMOS/LVTTL interface levels. Crystal oscillator interface. XTAL_IN is the input. XTAL_OUT is the output. Pulldown Frequency select pin. LVCMOS/LVTTL interface levels. Power supply ground. Single-ended clock output. LVCMOS/LVTTL interface levels. 7 typical output impedance. Core supply pin.
Output Power
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol CIN CPD RPULLUP RPULLDOWN ROUT Parameter Input Capacitance Power Dissipation Capacitance Input Pullup Resistor Input Pulldown Resistor Output Impedance 5 VDD, VDDA = 3.465V VDD, VDDA = 2.625V Test Conditions Minimum Typical 4 TBD TBD 51 51 7 12 Maximum Units pF pF pF k k
TABLE 3. CONTROL FUNCTION TABLE
Control Inputs OE 0 1 Output Q Hi-Z Active
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REV. A JUNE 20, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840001I
FEMTOCLOCKSTMCRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
4.6V -0.5V to VDD + 0.5 V -0.5V to VDD + 0.5V 101.7C/W (0 mps) -65C to 150C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VDD Inputs, VI Outputs, VO Package Thermal Impedance, JA Storage Temperature, TSTG
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 3.3V5%, TA = -40C TO 85C
Symbol VDD VDDA IDD IDDA Parameter Core Supply Voltage Analog Supply Voltage Power Supply Current Analog Supply Current Test Conditions Minimum 3.135 3.135 Typical 3.3 3.3 75 8 Maximum 3.465 3.465 Units V V mA mA
TABLE 4B. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 2.5V5%, TA = -40C TO 85C
Symbol VDD VDDA IDD IDDA Parameter Core Supply Voltage Analog Supply Voltage Power Supply Current Analog Supply Current Test Conditions Minimum 2.375 2.375 Typical 2.5 2.5 73 8 Maximum 2.625 2.625 Units V V mA mA
TABLE 4C. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDA = 3.3V5% OR 2.5V5%, TA = -40C TO 85C
Symbol VIH VIL IIH IIL VOH Parameter Input High Voltage Input Low Voltage Input High Current Input Low Current FREQ_SEL OE FREQ_SEL OE Test Conditions VDD = 3.3V VDD = 2.5V VDD = 3.3V VDD = 2.5V VDD = VIN = 3.465V or 2.625V VDD = VIN = 3.465V or 2.625V VDD = 3.465V or 2.625V, VIN = 0V VDD = 3.465V or 2.625V, VIN = 0V VDD = 3.465V VDD = 2.625V -5 -150 2.6 1.8 0.5 Minimum 2 1. 7 -0.3 -0.3 Typical Maximum VDD + 0.3 VDD + 0.3 0.8 0.7 150 5 Units V V V V A A A A V V V
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1 VDD = 3.465V or 2.625V VOL NOTE 1: Outputs terminated with 50 to VDD/2. See Parameter Measurement Information Section, "Output Load Test Circuit" diagrams.
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REV. A JUNE 20, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840001I
FEMTOCLOCKSTMCRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
Test Conditions Minimum Typical Fundamental 26.5625 50 7 1 MHz pF mW Maximum Units
TABLE 5. CRYSTAL CHARACTERISTICS
Parameter Mode of Oscillation Frequency Equivalent Series Resistance (ESR) Shunt Capacitance Drive Level
TABLE 6A. AC CHARACTERISTICS, VDD = VDDA = 3.3V5%, TA = -40C TO 85C
Symbol fOUT Parameter Output Frequency Test Conditions FREQ_SEL = 1 FREQ_SEL = 0 fOUT = 106.25MHz, (637kHz to 5MHz) fOUT = 212.5MHz, (2.55MHz to 20MHz) 20% to 80% Minimum 186.66 93.33 Typical 212.5 106.25 0.70 0.50 400 50 Maximum 226.66 113.33 Units MHz MHz ps ps ps %
tjit(O)
tR / tF
RMS Phase Jitter (Random); NOTE 1 Output Rise/Fall Time
odc Output Duty Cycle All parameters are characterized @ 212.5MHz and 106.25MHz. NOTE 1: Please refer to the Phase Noise Plots following this section.
TABLE 6B. AC CHARACTERISTICS, VDD = VDDA = 2.5V5%, TA = -40C TO 85C
Symbol fOUT Parameter Output Frequency Test Conditions FREQ_SEL = 1 FREQ_SEL = 0 fOUT = 106.25MHz, (637kHz to 5MHz) fOUT = 212.5MHz, (2.55MHz to 20MHz) 20% to 80% Minimum 186.66 93.33 Typical 212.5 106.25 0.70 0.50 450 50 Maximum 226.66 113.33 Units MHz MHz ps ps ps %
tjit(O)
tR / tF
RMS Phase Jitter (Random); NOTE 1 Output Rise/Fall Time
odc Output Duty Cycle All parameters are characterized @ 212.5MHz and 106.25MHz. NOTE 1: Please refer to the Phase Noise Plots following this section.
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REV. A JUNE 20, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840001I
FEMTOCLOCKSTMCRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
TYPICAL PHASE NOISE AT 106.25MHZ
0 -10 -20 -30 -40 -50
Fibre Channel Filter 106.25MHz
RMS Phase Jitter (Random) 637kHz to 5MHz = 0.70ps (typical)
NOISE POWER dBc Hz
-60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 100 1k 10k 100k
Raw Phase Noise Data
Phase Noise Result by adding Fibre Channel Filter to raw data
1M 10M 100M
OFFSET FREQUENCY (HZ)
840001AGI
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REV. A JUNE 20, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840001I
FEMTOCLOCKSTMCRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
PARAMETER MEASUREMENT INFORMATION
1.65V 5% 1.25V5%
VDD , VDDA
SCOPE
Qx
VDD , VDDA
SCOPE
Qx
LVCMOS
GND
LVCMOS
GND
-1.65V 5%
-1.25V5%
3.3V OUTPUT LOAD AC TEST CIRCUIT
2.5V OUTPUT LOAD AC TEST CIRCUIT
Phase Noise Plot
Noise Power
80%
Phase Noise Mask
80% 20%
Clock Outputs
f1 Offset Frequency f2
20% tR tF
RMS Jitter = Area Under the Masked Phase Noise Plot
RMS PHASE JITTER
OUTPUT RISE/FALL TIME
V
DD
Q
t PW
t
2
PERIOD
odc =
t PW t PERIOD
x 100%
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
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REV. A JUNE 20, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840001I
FEMTOCLOCKSTMCRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS840001I provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. VDD and VDDA should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 1 illustrates how a 10 resistor along with a 10F and a .01F bypass capacitor should be connected to each VDDA pin.
3.3V or 2.5V VDD .01F 10
VDDA .01F 10F
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS840001I has been characterized with 18pF parallel resonant crystals. The capacitor values, C1 and C2, shown in Figure 2 below were determined using a 26.5625MHz, 18pF parallel resonant crystal and were chosen to minimize the ppm error. The optimum C1 and C2 values can be slightly adjusted for different board layouts.
XTAL_OUT C1 33p X1 18pF Parallel Crystal XTAL_IN C2 27p
Figure 2. CRYSTAL INPUt INTERFACE
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REV. A JUNE 20, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840001I
FEMTOCLOCKSTMCRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
different board layout, the C1 and C2 may be slightly adjusted for optimizing frequency accuracy. The output frequency can be set at either 106.25MHz or 212.5MHz. Leaving the R1 un-installed (or install 1k pull-down) will set the output frequency at 106.25MHz. Installing the R1 pull up will set the output frequency at 212.5MHz.
LAYOUT GUIDELINE
Figure 3A shows a schematic example of the ICS840001I. An example of LVCMOS termination is shown in this schematic. Additional LVCMOS termination approaches are shown in the LVCMOS Termination Application Note. In this example, an 18 pF parallel resonant 26.5625MHz crystal is used. The C1=27pF and C2=33pF are recommended for frequency accuracy. For
VDD R2 10
VDDA C3 10uF C4 0.1u U2 1 2 3 4 8 7 6 5 VDD Q
VDD
R1 1K R3 43 Zo = 50 Ohm
OE
VDDA OE XTAL_OUT XTAL_IN
VDD Q GND FREQ_SEL
FRE_SEL
C2 33pF
X1 840001I C5 0.1u LVCMOS
C1 27pF
VDD=3.3V
FIGURE 3A. ICS840001I SCHEMATIC EXAMPLE
PC BOARD LAYOUT EXAMPLE
Figure 3B shows an example of P.C. board layout. The crystal X1 footprint in this example allows either surface mount (HC49S) or through hole (HC49) package. C3 is 0805. C1 and C2 are
0402. Other resistors and capacitors are 0603. This layout assumes that the board has clean analog power and ground planes.
FIGURE 3B. ICS840001I PC BOARD LAYOUT EXAMPLE
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REV. A JUNE 20, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840001I
FEMTOCLOCKSTMCRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR RELIABILITY INFORMATION
TABLE 7. JAVS. AIR FLOW TABLE
FOR
8 LEAD TSSOP
JA by Velocity (Meters Per Second)
0
Multi-Layer PCB, JEDEC Standard Test Boards 101.7C/W
1
90.5C/W
2.5
89.8C/W
TRANSISTOR COUNT
The transistor count for ICS840001I is: 1521
840001AGI
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REV. A JUNE 20, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840001I
FEMTOCLOCKSTMCRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
8 LEAD TSSOP
PACKAGE OUTLINE - G SUFFIX
FOR
TABLE 8. PACKAGE DIMENSIONS
SYMBOL N A A1 A2 b c D E E1 e L aaa 0.45 0 -4.30 0.65 BASIC 0.75 8 0.10 -0.05 0.80 0.19 0.09 2.90 6.40 BASIC 4.50 Millimeters Minimum 8 1.20 0.15 1.05 0.30 0.20 3.10 Maximum
Reference Document: JEDEC Publication 95, MO-153
840001AGI
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REV. A JUNE 20, 2005
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS840001I
FEMTOCLOCKSTMCRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
Marking 001AI 001AI Package 8 lead TSSOP 8 lead TSSOP Shipping Packaging tube 2500 tape & reel Temperature -40C to 85C -40C to 85C
TABLE 9. ORDERING INFORMATION
Part/Order Number ICS840001AGI ICS840001AGIT
The aforementioned trademarks, HiPerClockSTM and FemtoClocksTM are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 840001AGI
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REV. A JUNE 20, 2005

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